1. Field of the Invention
The present invention relates to a semiconductor circuit, an integrated circuit including a plurality of semiconductor circuits, a method for driving the integrated circuit, and a semiconductor device including the integrated circuit.
2. Description of the Related Art
In recent years, the information society has been increasingly developed, and the demand for higher speed, higher capacity, smaller size, lighter weight, or the like of a personal computer, a cellular phone, or the like has been increased. In the tide of the times, a large-scale integrated circuit (large scale integration (LSI)) and a central processing unit (CPU) need higher integration, higher operation speed, and lower power consumption.
An integrated circuit such as an LSI or a CPU is mounted on a circuit board or a printed wiring board and is used as one of the components of a variety of electronic devices.
An electronic device including an integrated circuit puts importance not only on power consumption in an operating period but also on power consumption in a standby period. In particular, in a portable electronic device, power is supplied from a battery, and the uptime is limited due to a limited amount of power. Further, in an in-car electronic device, when power consumption in a standby period is high, the lifetime of a battery might be reduced. For example, in the case of an electric car, leakage current of an in-car electronic device shortens the travel distance per certain amount of charge.
In order to reduce power consumption of an integrated circuit in a standby period, it is effective to turn off the power in a state in which a semiconductor circuit included in the integrated circuit does not perform computation. For example, a method has been known by which a power breaker is provided over the same chip as an integrated circuit and the integrated circuit is selectively switched to a resting state by the power breaker so that power consumption is reduced (see Reference 1).
Note that in the case where the semiconductor circuit included in the integrated circuit is volatile, when the power of the integrated circuit is turned off, data which is being processed in the semiconductor circuit is lost. As a method for solving such a problem, a method has been disclosed in which a memory circuit portion capable of retaining data even when the power is off is provided separately from an integrated circuit and the power is turned off after data is retained in the memory circuit portion (see References 2 and 3). An integrated circuit disclosed in Reference 2 retains data in a nonvolatile memory circuit portion when the integrated circuit is in a resting state; thus, it is not necessary to supply power to the integrated circuit when the integrated circuit is in the resting state, and power consumption can be reduced.
[Reference]
Reference 1: United States Patent Application Publication No. 2003/052730
Reference 2: PCT International Publication No. 2009/107408
Reference 3: United States Patent Application Publication No. 2004/105302
In order to retain data in an integrated circuit by the above method, data stored in a sequential logic circuit (e.g., a flip-flop (FF)) for retaining data in the integrated circuit is transferred to a nonvolatile memory circuit portion so that the data is retained in the integrated circuit.
However, in the case of a huge integrated circuit or the like including countless FFs, it is necessary to write a large amount of data retained in the countless FFs to a memory circuit portion. Thus, in the case where the memory circuit portion is provided separately from the integrated circuit, a large amount of data is transferred through a limited number of signal lines. Consequently, it takes time to write data from the integrated circuit to the memory circuit portion, so that it is impossible to switch the integrated circuit to a resting state rapidly. As a result, it is impossible to rest the integrated circuit frequently and the effect of reduction in power consumption is decreased.
In addition, it takes time to read the data stored before the rest from the memory circuit portion in a return period and to store the data in each FF in the integrated circuit. Thus, it is difficult to return the integrated circuit from the resting state at high speed.